As consumers continue to push electronics manufacturers for smaller yet higher functioning products, packaging engineers must keep pace with the development of devices that can meet these demands.  Newer generation stacked die CSP (SCSP) and emerging stacked package – or package on package (POP) – technologies are addressing the miniaturization challenge, but certainly not without some obstacles of their own.

One such hurdle is the ability to handle the incredibly thin wafers and die that must be used in order for stacked technology to move to the next level. When one considers that wafer thicknesses are currently at 75 microns with 50 micron and 25 micron thicknesses soon to be the norm, it becomes clear that wafer mechanical stability and die handling top the list of manufacturing challenges to be addressed. While die attach pastes still have their place for certain applications, film technology is emerging as the most process-conducive and cost-effective material to move integrated package technology forward.

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This article appeared in Global SMT & Packaging 7.11, November 2007.