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7.4 – Your questions answered at APEX 2007 PDF Print E-mail
 

Posted by Bob Willis on 11 May 2007 at 09:02

(This column is also available as a PDF.)

IPC and Global SMT & Packaging magazine, along with four sponsoring companies, Dage, Kester, KIC and RMD, provided a special visitor feature at this year’s APEX Exhibition in downtown Los Angles, California. Your Global columnist organised and ran this special feature for three days of the show, offering advice and answering questions on production problems, including lead-free and RoHS.

Here are some of the interesting process issues discussed and some of the general answers given during this unique event. We have illustrated some of the issues raised with typical photographs of the problems from our image library to avoid using actual visitor examples.

Q: We have blow holes on the surface of chip component joints. These are found after reflow soldering. Our profile is ideal and the holes seem to be just on one type of chip?

A: Generally most people relate this problem to the paste used or the temperature profile. Outgassing can also be seen from the surface coating on the board, most commonly resulting as micro, fizz or champagne voiding on area array joints. The example on chip components can often be related to the surface metallisation on the component and has been seen during micro video filming. In the past it has been seen on through-hole leads where a high level of organics are present in the surface of the coating.

One way to demonstrate that the gassing is coming from the surface coating is to take a clear oil that you slowly heat up to soldering temperature and monitor the components. The same oil that is used for PCB outgassing tests is suitable.


Figure 1 - Example of a void in a chip termination after reflow soldering


Figure 2 - Outgassing through the copper plating in a through hole is shown with the bubbles in the oil

Q: We have experienced voids in underfill leading to solder shorts forming between terminations when the component is reflowed for the second time during board assembly?

A: This is not that common, but I have experienced it on no-flow underfill materials during product trials. Obviously this is possible if the underfill has voids due to the process used, flux around the terminations, the standoff gap or outgassing from the solder mask surface. If the solder goes into a liquid state again due to the pressure induced, it could flow and short between terminations, resulting in thin shorts. Based on the problem discussed, the standoff height of the package seemed to have compounded the problem. The recommendation to prove out the process theory was bumping the terminations with a higher temperature alloy, using a print and reflow techniques.

Q: We are looking to purchase a cleaning system for production. We need to evaluate the capability to clean boards and then test the cleanliness under components with a small standoff height?

A: A simple method I have used for years is small microscope slides fixed to the board surface. Using thin metal shims it is possible to maintain a fixed standoff height for testing. Using the slides allows flux residues to be monitored under the glass during changes in cleaning parameters. It can also allow you to monitor the solvent penetration and, more importantly, during water wash, the amount of water left under the glass prior to drying.

This method can also be used to assess the ability of the contamination testing equipment to penetrate and remove ionic residues. Using a calibrated test solution of a known volume placed under the slide, measurements can be made of the cleanliness and the minimum standoff height detectable.


Figure - 3 Example of glass slide on the surface of a PCB used as a test vehicle for cleaning assessment. The glass is supported off the surface of the board with 0.002 + 0.004” metal shims.

Q: We are running boards from two suppliers with nickel/gold finish and experiencing failures on 0402 chips and wire bonding. The problem is only seen on one supplier’s boards?

A: Easy answer, but probably more difficult to prove the root cause of the failure. Nine times out of ten it is the surface finish and how well it has been applied, and the controls of the plating process. From the examples examined, the cause was probably a poor nickel surface which allowed no true intermetallic to form. Based on discussions it may not have been classic ‘black pad’ that everyone seems to quote.

It was clear that the PCB supplier was not controlling his process compared to the second supplier. In this situation I often ask to review the supplier’s audit reports, which are normally produced. Chemistry suppliers to the industry want to get the best performance from their product for their customers and will be very detailed in their line audits.

Q: We are experiencing delamination of boards produced with a non-woven laminate with one of our customers; all the process parameters seem to be satisfactory at fabrication and assembly?

A: One of the most important parameters for these non woven products is lamination even though they do have higher moisture content. Clearly in the example shown there has been a lack of satisfactory wetting of the copper surface during manufacture. Obviously the stress applied during soldering and the pressure of any moisture has caused the board to delaminate. The root cause of the problem is either poor copper preparation or lamination of the panel. Looking back at a past interview with Michael Weinhold, European Institute of Printed Circuits, Switzerland, outlines the issues. Michael is well known in the industry and played a key part in the industry launch of this type of material. You can see the RealPlayer video clip at www.smartgroup.org/spotnov02.asp


Figure 4 - Example of PCB delamination with poor wetting to the copper surface of the inner layer.

Q: I have read articles on wetting indicators used for solderability assessment in production, what are these and where are the results available?

A: Basically the solder spot wetting test measures the number of dots of solder paste reflowing together on different PCB surface finishes. The image shows typical results when using the test area on a production board. You can find out more about the wetting indicators for in process solderability testing, the design and criteria with documents I have produced. You can download the file at www.smartgroup.org/zip/Wettingtest.zip

Results of using this test have been compiled in a report produced for the SMART Group over the last four years with lead-free solder paste and five different surface finishes www.smartgroup.org/experience/experiencereport2006.pdf


Figure 5 - Example of wetting spot test pattern which can be added to any board for in process wetting assessment of a total production process.

Q: How do I overcome copper dissolution on selective soldering where it is necessary to hold the board in contact with the solder for extended times?

A: When you are soldering to a printed circuit board, you will dissolve copper from the pad and the barrel of the plated through hole. Dissolution is more obvious on the bottom pad and the knee of the hole due to the flow rate of the solder. When using lead-free solder, there is a much higher dissolution rate of copper into the solder bath, and is a currently under investigation in a project being undertaken by NPL www.npl.co.uk/ei

All solder finishes will suffer from this problem with the exception of nickel/gold as the nickel surface acts as a barrier layer to dissolution. All potential users should look at more effective pre-heat systems or re-profile the boards they are running to reduce solder contact time. This is the best and preferred course of action to reduce copper loss; this does assume that the minimum copper plating of 0.020” is on the board in the first place?


Figure 6 - Example of total dissolution of a pad during selective soldering with lead-free alloy.

Q: Have you experienced problems with lead-free paste contamination with lead and the reliability of the reflowed joints?

A: First every effort should be made to control the process to eliminate the possibility of having joints contaminated with lead. The first reason is economics; the products produced become un-salable in many markets, just scrap. There are many reports on trials conducted with different levels of lead; the most common of these is lead-free BGA packages reflowed in a tin/lead process. The projects have looked at full lead distribution in the bulk of the ball or limited dissolution. The only area not fully investigated is the reliability of the joints when the ball does not collapse at all.

Generally the results indicate that, for the majority of applications, there is no difference in reliability. One of the reports that is freely available to industry comes from NPL and available from www.npl.co.uk/ei (Studio Project – “Measuring the reliability of electronics assemblies during the transition period to lead-free soldering”).


Figure 7 - Example of a lead-free BGA joint where the solder ball has not totally collapsed during reflow in a tin/lead process.

Q: We are experiencing different levels of BGA warpage during lead-free reflow soldering between side one and two of our products, what is the cause?

A: First check the temperature profile on both sides of the board for your first and second side reflow profiles. Some engineers do tend to use the same profile for board sides of the board? Next look at the time delay between reflowing side one and side two; often people forget that BGAs still absorb moisture after side one reflow, waiting to be reflowed a second time.

This column originally appeared in Global SMT & Packaging 7.4 - April 2007.


Bob Willis is a process engineer providing engineering support in conventional and surface mount assembly processes. He runs production lines for suppliers at exhibitions and also provides seminar and workshops worldwide. These complement his own hands on workshops. For further information on how Bob may be able to support your staff contact him via his web site www.ASKbobwillis.com

   
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